Karol Desnos

He is an associate professor at the National Institute of Applied Science (INSA) of Rennes. He holds a joint appointement at the Institute of Electronics and Telecommunications of Rennes (IETR). He obtained his PhD in Signal and Image Processing from the INSA Rennes in 2014. This work was co-supervised by the Pr. Jean-François Nezan and Dr. Maxime Pelcat from the IETR, and by Dr. Slaheddine Aridhi from Texas Instruments, France. His research interests focus on dataflow models of computation and associated implementation techniques for the rapid prototyping of applications running on heterogeneous MPSoCs. In particular, his Ph.D. thesis focuses on the memory characterization and optimization of dataflow applications on MPSoCs. Since 2011, he contributes to the development of the PREESM open-source rapid prototyping. Karol Desnos co-authored more than 20 articles in peer-reviewed international journals and conferences. He has served as a member of the technical program committee of 3 international conferences (SiPS, DASIP, ASR-MOV). He has been actively involved in several projects including H2020 Project (CERBERO), French ANR Projects (COMPA, ARTEFACT), U.S. NSF Project (COMPACTS-SL-MODELS), and a young researcher project funded by the French research society "GdR ISIS" (MORDRED) which he leads. He took part in the creation of the MTAPI standard with the Multicore Association. In Fall 2012, Karol Desnos was a visiting researcher at the University of Maryland in the DSPCAD research group led by Pr. Shuvra Bhattacharyya. Since 2015, he has given invited lectures at INSA Euromediterranee (Fès, Morocco), at Universidad Politecnica de Madrid (Madrid, Spain), and at University of Rennes 1.

Daniel Ménard

He is Full-Professor at the Department of Electrical and Computer Engineering (ECE) at the National Institute of Applied Sciences (INSA) in Rennes and is also member of the IETR/CNRS laboratory. He received the Ph.D. and HDR (habilitation to conduct researches) degrees in Signal Processing and Telecommunications from the University of Rennes, respectively in 2002 and 2011. From 2003 to 2012 he was an associate professor at the ECE department of the University of Rennes engineering school, ENSSAT. He was also member of the IRISA/INRIA laboratory. His research interests include implementation of image and signal processing applications in embedded systems, fixed-point arithmetic, low power systems, multi-core processing, data-flow programming, video and vision systems. Daniel Ménard has published more than 70 scientific papers in international journal and conferences. Daniel Menard has been involved in different French ANR projects (OSGAR, ROMA, COMPA, DEFIS), R&D projects, (Nano2012), R&D FUI projects (GreenVideo), P2R France-Germany projects (COMAP) and EU FP7 project (ALMA).

Jean-Francois Nezan

He is a Professor at the Department of Electrical and Computer Engineering at the National Institute of Applied Sciences (INSA), Rennes Scientific and Technical University. Pr. Jean- Francois Nezan holds a joint appointment in the Institute of Electronics and Telecommunications of Rennes (IETR). He is coauthor or coeditor of more than 70 technical articles including 1 Book, 1 Book chapter, 16 publications in International Journals and 2 patents. He supervised 11 defended PhDs and currently supervises 3 PhDs. Jean-François Nezan is involved in the french research society “GDR I I ” in the theme entitled “adequation algorithm architecture” and the European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC). He participated to the setting-up and the management of 5 founded national projects including the COMPA project he led, 1 European project and 10 research agreements with industrial partners. His research topic is the rapid prototyping of standard video compression on embedded architectures. Since 2007, he is involved in the ISO/IEC JTC1/SC29/ WG11 standardization activities (better known as MPEG). His research interests include signal processing systems (video, vision and telecommunication algorithms), architectures, and software; embedded software; and hardware/software co-design.

Maxime Pelcat

He is an Associate Professor at the Department of Electrical and Computer Engineering at the National Institute of Applied Sciences (INSA) in Rennes. He holds a joint appointment at the Institute of Electronics and Telecommunications of Rennes (IETR) and at Institut Pascal in Clermont Ferrand, two CNRS research units. He is an author of 30+ peer reviewed publications since 2009 in the domains of models of computation, energy efficiency, multimedia and telecommunication processing, and programming of parallel embedded systems. Maxime Pelcat is a member of the HiPEAC network. He obtained his Ph.D. in signal processing from INSA in 2010, thesis resulting from a collaboration of Texas Instruments, Nice and INSA Rennes. Previously, after one year in the Audio and Multimedia department at Fraunhofer Institute IIS in Erlangen, Germany, he worked as a contractor at France Telecom Research and Development until 2006. He has served as Guest Editor for the Springer Journal of Signal Processing Systems and is an author of the best paper award at DASIP 2014, the best demo awards at ICME 2015 and EDERC 2014 and of the book "Physical Layer Multi-Core Prototyping" Springer, 2012.

Florian Arrestier

He has received the Engineering degree in Electronics and Computer Engineering from the National Institute of Applied Sciences in Rennes (INSA) in 2017. He is currently pursuing a PhD degree in Electrical and Computer Engineering from the Institute of Electronics and Telecommunications of Rennes (IETR) laboratory.

Alexandre Honorat

He obtained his Master diploma in High Performance Computing from the ENSEIRB-MATMECA French engineering school in 2015. He worked during two years with the TEA team at Inria Rennes to maintain the ADFG scheduling synthesizer. He also participated to link the ADFG tool with the AADL analyzer in Polychrony, which generates Signal programs. Now he continues to study scheduling of real-time systems as a PhD student of the VAADER team at the IETR laboratory also in Rennes (being part of the INSA engineering school). In Cerbero he focuses on extending the dataflow model with real-time and energy constraints. The extended model and the related multi-criteria scheduling algorithms it needs will be implemented in the PREESM tool.

Antoine Morvan

He is a Research Engineer working full time on the Cerbero project within the VAADER team at IETR - INSA Rennes. His main activities consists in maintaining the PREESM tool and integrating the tool in the project toolchain. His interests revolve around program transformation and design productivity, ranging from hardware design to software optimisations, including code quality aspects.
He received his M.Sc. degree in computer science from University of Rennes 1 in 2009. He then worked on his Ph.D. thesis about Polyhedral Compilation for High-Level Synthesis in the CAIRN team at IRISA, Rennes, France. He received the degree from Ecole Normale Suprieure of Cachan - antenne de Bretagne in 2013.